Improvement of Performance of HfS$_{2}$ Transistors Using a Self-Assembled Monolayer as Gate Dielectric
Wen-Lun Zhang**
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Meguro, Tokyo 152-8552, Japan
Abstract :This work details a study based on HfS$_{2}$ transistors utilizing an n-octadecylphosphonic acid-based self-assembled monolayer (SAM) as the gate dielectric. The fabrication of the SAM-based two-dimensional (2D) material transistor is simple and can be used to improve the quality of the interface of air-sensitive 2D materials. In comparison to HfS$_{2}$ transistors utilizing a conventional Al$_{2}$O$_{3}$ gate insulator by atomic layer deposition, HfS$_{2}$ transistors utilizing an SAM as the gate dielectric can reduce the operation region from 4 V to 2 V, enhance the field-effect mobility from 0.03 cm$^{2}$/Vs to 0.75 cm$^{2}$/Vs, improve the sub-threshold swing from 404 mV/dec to 156 mV/dec, and optimize the hysteresis to 0.03 V, thus demonstrating improved quality of the semiconductor/insulator interface.
收稿日期: 2019-03-21
出版日期: 2019-05-18
:
73.63.Bd
(Nanocrystalline materials)
73.40.Qv
(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))
68.35.Ct
(Interface structure and roughness)
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