| CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES |
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Improvement of Performance of HfS$_{2}$ Transistors Using a Self-Assembled Monolayer as Gate Dielectric |
| Wen-Lun Zhang** |
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Meguro, Tokyo 152-8552, Japan
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| Cite this article: |
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Wen-Lun Zhang 2019 Chin. Phys. Lett. 36 067301 |
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Abstract This work details a study based on HfS$_{2}$ transistors utilizing an n-octadecylphosphonic acid-based self-assembled monolayer (SAM) as the gate dielectric. The fabrication of the SAM-based two-dimensional (2D) material transistor is simple and can be used to improve the quality of the interface of air-sensitive 2D materials. In comparison to HfS$_{2}$ transistors utilizing a conventional Al$_{2}$O$_{3}$ gate insulator by atomic layer deposition, HfS$_{2}$ transistors utilizing an SAM as the gate dielectric can reduce the operation region from 4 V to 2 V, enhance the field-effect mobility from 0.03 cm$^{2}$/Vs to 0.75 cm$^{2}$/Vs, improve the sub-threshold swing from 404 mV/dec to 156 mV/dec, and optimize the hysteresis to 0.03 V, thus demonstrating improved quality of the semiconductor/insulator interface.
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Received: 21 March 2019
Published: 18 May 2019
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| PACS: |
73.63.Bd
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(Nanocrystalline materials)
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73.40.Qv
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(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))
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68.35.Ct
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(Interface structure and roughness)
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| Fund: Supported by the Japan Society for the Promotion of Science under Grant No JP25107004. |
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