Resistivity and Radio-Frequency Properties of Two-Generation Trap-Rich Silicon-on-Insulator Substrates
Lei Zhu1,2,3, Yong-Wei Chang1,3, Nan Gao1,3, Xin Su1,3, YeMin Dong1,3, Lu Fei1,3,4, Xing Wei1,4**, Xi Wang1,2,3
1State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050 2School of Physical Science and Technology, Shanghaitech University, Shanghai 200031 3University of Chinese Academy of Sciences, Beijing 100049 4Shanghai Simgui Technology Co., Ltd., Shanghai 201815
Abstract：Crystal morphologies and resistivity of polysilicon trap-rich layers of two-generation trap-rich silicon-on-insulator (TR-SOI) substrates are studied. It is found that the resistivity of the trap-rich layer of generation 2 (TR-G2) is higher than that of generation 1 (TR-G1), although the crystal morphologies of the trap rich layers are the same. In addition, the rf performance of two-generation TR-SOI substrates is investigated by coplanar waveguide lines and inductors. The results show that both the rf loss and the second harmonic distortion of TR-G2 are smaller than those of TR-G1. These results can be attributed to the higher resistivity values of both the trap-rich layer and the high-resistivity silicon (HR-Si) substrate of TR-G2. Moreover, the rf performance of the TR-SOI substrate with thicker buried oxide is slightly better. The second harmonics of various TR-SOI substrates are simulated and evaluated with the harmonic quality factor model as well. It can be predicted that the TR-SOI substrate will see further improvement in rf performance if the resistivities of both the trap-rich layer and HR-Si substrate increase.
Delatte P, Picun G, Demeus L, Simon P and Flandre D 2005 31st European Solid-State Circuits Conference (Grenoble, France 12–16 September 2005) p 395
[2]
Tinella C, Richard O, Cathelin A, Reaute F, Majcherczak S, Blanchet F and Belot D 2006 Topical Meeting Silicon Monolithic Integrated Circuits RF Syst. (San Diego CA, USA 18–20 January 2006) p 58
Jansman A B M, van Beek J T M, van Delden M H W M, Kemmeren A L A M, den Dekker A and Widdershoven F P 33rd Conference on European Solid-State Device Research (Estoril, Portugal 16–18 September 2003) p 3
Neve C R, Alia K B, Malaquin C, Allibert F, Desbonnets E, Bertr, I, Van Den Daele W and Raskin J P 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (Austin TX, USA 21–23 January 2013) p 15
2018, Vol. 35 
