CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY |
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Ohmic Contact at Al/TiO$_{2}$/n-Ge Interface with TiO$_{2}$ Deposited at Extremely Low Temperature |
Yi Zhang, Gen-Quan Han**, Yan Liu, Huan Liu, Jin-Cheng Zhang, Yue Hao |
Key Laboratory of Wide Band-Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi'an 710071
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Cite this article: |
Yi Zhang, Gen-Quan Han, Yan Liu et al 2018 Chin. Phys. Lett. 35 028501 |
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Abstract TiO$_{2}$ deposited at extremely low temperature of 120$^\circ\!$C by atomic layer deposition is inserted between metal and n-Ge to relieve the Fermi level pinning. X-ray photoelectron spectroscopy and cross-sectional transmission electron microscopy indicate that the lower deposition temperature tends to effectively eliminate the formation of GeO$_{x}$ to reduce the tunneling resistance. Compared with TiO$_{2}$ deposited at higher temperature of 250$^\circ\!$C, there are more oxygen vacancies in lower-temperature-deposited TiO$_{2}$, which will dope TiO$_{2}$ contributing to the lower tunneling resistance. Al/TiO$_{2}$/n-Ge metal-insulator-semiconductor diodes with 2 nm 120$^\circ\!$C deposited TiO$_{2}$ achieves 2496 times of current density at $-$0.1 V compared with the device without the TiO$_{2}$ interface layer case, and is 8.85 times larger than that with 250$^\circ\!$C deposited TiO$_{2}$. Thus inserting extremely low temperature deposited TiO$_{2}$ to depin the Fermi level for n-Ge may be a better choice.
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Received: 12 October 2017
Published: 23 January 2018
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PACS: |
85.30.Hi
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(Surface barrier, boundary, and point contact devices)
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85.30.De
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(Semiconductor-device characterization, design, and modeling)
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85.30.Kk
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(Junction diodes)
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85.30.Tv
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(Field effect devices)
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Fund: Supported by the National Natural Science Foundation of China under Grant Nos 61534004, 61604112 and 61622405. |
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