| CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY |
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Enhancement of Carrier Mobility in Semiconductor Nanostructures by Carrier Distribution Engineering |
| Binxi Liang, Luhao Liu, Jiachen Tang, Jian Chen, Yi Shi*, and Songlin Li* |
| School of Electronic Science and Engineering, National Laboratory of Solid-State Microstructures, and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210023, China |
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| Cite this article: |
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Binxi Liang, Luhao Liu, Jiachen Tang et al 2023 Chin. Phys. Lett. 40 058503 |
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Abstract Two-dimensional (2D) van der Waals semiconductors are appealing for low-power transistors. Here, we show the feasibility in enhancing carrier mobility in 2D semiconductors through engineering the vertical distribution of carriers confined inside ultrathin channels via symmetrizing gate configuration or increasing channel thickness. Through self-consistently solving the Schrödinger–Poisson equations, the shapes of electron envelope functions are extensively investigated by clarifying their relationship with gate configuration, channel thickness, dielectric permittivity, and electron density. The impacts of electron distribution variation on various carrier scattering matrix elements and overall carrier mobility are insightfully clarified. It is found that the carrier mobility can be generally enhanced in the dual-gated configuration due to the centralization of carrier redistribution in the nanometer-thick semiconductor channels and the rate of increase reaches up to 23% in HfO$_{2}$ dual-gated 10-layer MoS$_{2}$ channels. This finding represents a viable strategy for performance optimization in transistors consisting of 2D semiconductors.
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Received: 21 March 2023
Published: 01 May 2023
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| PACS: |
85.30.Tv
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(Field effect devices)
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85.35.-p
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(Nanoelectronic devices)
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73.63.-b
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(Electronic transport in nanoscale materials and structures)
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73.50.Bk
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(General theory, scattering mechanisms)
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