Chin. Phys. Lett.  2018, Vol. 35 Issue (5): 057302    DOI: 10.1088/0256-307X/35/5/057302
Improvement of Operation Characteristics for MONOS Charge Trapping Flash Memory with SiGe Buried Channel
Zhao-Zhao Hou1,2, Gui-Lei Wang1,2, Jia-Xin Yao1,2, Qing-Zhu Zhang1, Hua-Xiang Yin1,2**
1Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029
2University of Chinese Academy of Sciences, Beijing 100049
Cite this article:   
Zhao-Zhao Hou, Gui-Lei Wang, Jia-Xin Yao et al  2018 Chin. Phys. Lett. 35 057302
Download: PDF(875KB)   PDF(mobile)(874KB)   HTML
Export: BibTeX | EndNote | Reference Manager | ProCite | RefWorks
Abstract We propose and investigate a novel metal/SiO$_{2}$/Si$_{3}$N$_{4}$/SiO$_{2}$/SiGe charge trapping flash memory structure (named as MONOS), utilizing SiGe as the buried channel. The fabricated memory device demonstrates excellent program-erasable characteristics attributed to the fact that more carriers are generated by the smaller bandgap of SiGe during program/erase operations. A flat-band voltage shift 2.8 V can be obtained by programming at +11 V for 100 μs. Meanwhile, the memory device exhibits a large memory window of $\sim$7.17 V under $\pm$12 V sweeping voltage, and a negligible charge loss of 18% after 10$^{4}$ s' retention. In addition, the leakage current density is lower than $2.52\times10^{-7}$ A$\cdot$cm$^{-2}$ below a gate breakdown voltage of 12.5 V. Investigation of leakage current-voltage indicates that the Schottky emission is the predominant conduction mechanisms for leakage current. These desirable characteristics are ascribed to the higher trap density of the Si$_{3}$N$_{4}$ charge trapping layer and the better quality of the interface between the SiO$_{2}$ tunneling layer and the SiGe buried channel. Therefore, the application of the SiGe buried channel is very promising to construct 3D charge trapping NAND flash devices with improved operation characteristics.
Received: 01 February 2018      Published: 30 April 2018
PACS:  73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator)) (For nonsilicon electronics (Ge, III-V, II-VI, organic electronics))  
  77.55.Px (Epitaxial and superlattice films)  
  72.20.Jv (Charge carriers: generation, recombination, lifetime, and trapping)  
Fund: Supported by the National Science and Technology Major Project of China under Grant No 2013ZX02303007, the National Key Research and Development Program of China under Grant No 2016YFA0301701, and the Youth Innovation Promotion Association of the Chinese Academy of Sciences under Grant No 2016112.
URL:       OR
E-mail this article
E-mail Alert
Articles by authors
Zhao-Zhao Hou
Gui-Lei Wang
Jia-Xin Yao
Qing-Zhu Zhang
Hua-Xiang Yin
[1]Arreghini A, Delhougne R, Subirats A et al 2017 Proc. IEEE IMW p 115
[2]Ji H, Wei Y, Ma P and Jiang R 2018 IEEE J. Electron. Devices Soc. 6 81
[3]Tang Z, Zhu X, Xu H et al 2013 Mater. Lett. 92 21
[4]Lee D U et al 2012 Appl. Phys. Lett. 100 072901
[5]Hou Z, Wang G, Xiang J et al 2017 Chin. Phys. Lett. 34 097304
[6]Liu L J, Chang-Liao K S, Keng W C et al 2010 Solid-State Electron. 54 1113
[7]Lin Y H and Chien C H 2013 Solid-State Electron. 80 5
[8]Chen C Y, Chang-Liao K S, Liu L J et al 2014 IEEE Electron Device Lett. 35 1025
[9]Liu L J, Chang-Liao K S, Jian Y C et al 2012 IEEE Electron Device Lett. 33 1264
[10]Wang G, Luo J, Qin C et al 2017 Nanoscale Res. Lett. 12 123
[11]Shen Y S, Chen K Y, Chen P C et al 2017 Sci. Rep. 7 43659
[12]Maikap S, Lee H Y, Wang T Y et al 2007 Semicond. Sci. Technol. 22 884
[13]Cao D, Cheng X, Jia T et al 2013 Nucl. Instrum. Methods Phys. Res. Sect. B 307 463
[14]Jung M H, Kim K S, Park G H et al 2009 Appl. Phys. Lett. 94 053508
[15]Xu W, Zhang Y, Tang Z et al 2017 Nanoscale Res. Lett. 12 270
[16]Yan X, Yang T, Jia X et al 2017 Phys. Lett. A 381 913
[17]Qiu X Y, Zhou G D, Li J et al 2014 Thin Solid Films 562 674
[18]Altuntas H, Ozgit-Akgun C, Donmez I et al 2015 J. Appl. Phys. 117 155101
Related articles from Frontiers Journals
[1] Hao Liu , Wen-Jun Liu, Yi-Fan Xiao , Chao-Chao Liu , Xiao-Han Wu , and Shi-Jin Ding . Band Alignment at the Al$_{2}$O$_{3}/\beta$-Ga$_{2}$O$_{3}$ Interface with CHF$_{3}$ Treatment[J]. Chin. Phys. Lett., 2020, 37(7): 057302
[2] Wen-Lun Zhang. Improvement of Performance of HfS$_{2}$ Transistors Using a Self-Assembled Monolayer as Gate Dielectric[J]. Chin. Phys. Lett., 2019, 36(6): 057302
[3] Yuan Liu, Li Wang, Shu-Ting Cai, Ya-Yi Chen, Rongsheng Chen, Xiao-Ming Xiong, Kui-Wei Geng. Temperature Dependence of Electrical Characteristics in Indium-Zinc-Oxide Thin Film Transistors from 10K to 400K[J]. Chin. Phys. Lett., 2018, 35(9): 057302
[4] Bin-Xu, Jing-Ping Xu, Lu Liu, Yong Su. Improvements of Interfacial and Electrical Properties for Ge MOS Capacitor with LaTaON Gate Dielectric by Optimizing Ta Content[J]. Chin. Phys. Lett., 2018, 35(7): 057302
[5] Qi-Wen Zheng, Jiang-Wei Cui, Ying Wei, Xue-Feng Yu, Wu Lu, Diyuan Ren, Qi Guo. Bias Dependence of Radiation-Induced Narrow-Width Channel Effects in 65nm NMOSFETs[J]. Chin. Phys. Lett., 2018, 35(4): 057302
[6] Ya-Yi Chen, Yuan Liu, Zhao-Hui Wu, Li Wang, Bin Li, Yun-Fei En, Yi-Qiang Chen. Low-Frequency Noise in Amorphous Indium Zinc Oxide Thin Film Transistors with Aluminum Oxide Gate Insulator[J]. Chin. Phys. Lett., 2018, 35(4): 057302
[7] Can Li, Cong-Wei Liao, Tian-Bao Yu, Jian-Yuan Ke, Sheng-Xiang Huang, Lian-Wen Deng. Concise Modeling of Amorphous Dual-Gate In-Ga-Zn-O Thin-Film Transistors for Integrated Circuit Designs[J]. Chin. Phys. Lett., 2018, 35(2): 057302
[8] Zhao-Zhao Hou, Gui-Lei Wang, Jin-Juan Xiang, Jia-Xin Yao, Zhen-Hua Wu, Qing-Zhu Zhang, Hua-Xiang Yin. Improved Operation Characteristics for Nonvolatile Charge-Trapping Memory Capacitors with High-$\kappa$ Dielectrics and SiGe Epitaxial Substrates[J]. Chin. Phys. Lett., 2017, 34(9): 057302
[9] Sheng-Kai Wang, Lei Ma, Hu-Dong Chang, Bing Sun, Yu-Yu Su, Le Zhong, Hai-Ou Li, Zhi Jin, Xin-Yu Liu, Hong-Gang Liu. Positive Bias Temperature Instability Degradation of Buried InGaAs Channel nMOSFETs with InGaP Barrier Layer and Al$_{2}$O$_{3}$ Dielectric[J]. Chin. Phys. Lett., 2017, 34(5): 057302
[10] Han-Han Lu, Jing-Ping Xu, Lu Liu. Interfacial and Electrical Properties of GaAs Metal-Oxide-Semiconductor Capacitor with ZrAlON as the Interfacial Passivation Layer[J]. Chin. Phys. Lett., 2017, 34(4): 057302
[11] Yuan Liu, Kai Liu, Rong-Sheng Chen, Yu-Rong Liu, Yun-Fei En, Bin Li, Wen-Xiao Fang. Total Ionizing Dose Radiation Effects in the P-Type Polycrystalline Silicon Thin Film Transistors[J]. Chin. Phys. Lett., 2017, 34(1): 057302
[12] Yi-Tao He, Ming Qiao, Lu Li, Gang Dai, Bo Zhang, Zhao-Ji Li. A Lateral Regulator Diode with Field Plates for Light-Emitting-Diode Lighting[J]. Chin. Phys. Lett., 2016, 33(09): 057302
[13] Qi-Wen Zheng, Jiang-Wei Cui, Hang Zhou, De-Zhao Yu, Xue-Feng Yu, Qi Guo. Hot-Carrier Effects on Total Dose Irradiated 65nm n-Type Metal-Oxide-Semiconductor Field-Effect Transistors[J]. Chin. Phys. Lett., 2016, 33(07): 057302
[14] Lan-Feng Tang, Hai Lu, Fang-Fang Ren, Dong Zhou, Rong Zhang, You-Dou Zheng, Xiao-Ming Huang,. Electrical Instability of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors under Ultraviolet Illumination[J]. Chin. Phys. Lett., 2016, 33(03): 057302
[15] SHEN Hua-Jun, TANG Ya-Chao, PENG Zhao-Yang, DENG Xiao-Chuan, BAI Yun, WANG Yi-Yu, LI Cheng-Zhan, LIU Ke-An, LIU Xin-Yu. Fabrication and Characterization of 1700 V 4H-SiC Vertical Double-Implanted Metal-Oxide-Semiconductor Field-Effect Transistors[J]. Chin. Phys. Lett., 2015, 32(12): 057302
Full text