| CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY |
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Impact of Band-Engineering to Performance of High-k Multilayer Based Charge Trapping Memory |
| LIU Li-Fang1**, PAN Li-Yang1,2**, ZHANG Zhi-Gang1, XU Jun1 |
1Institute of Microelectronics, Tsinghua University, Beijing 100084
2Graduate School at Shenzhen, Tsinghua University, Shenzhen 518055
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| Cite this article: |
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LIU Li-Fang, PAN Li-Yang, ZHANG Zhi-Gang et al 2015 Chin. Phys. Lett. 32 088501 |
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Abstract Impact of band-engineering to the performance of charge trapping memory with HfO2/Ta2O5/HfO2 (HTH) as the charge trapping layer is investigated. Compared with devices with the same total HfO2 thickness, structures with Ta2O5 closer to substrates show larger program/erase window, because the 2nd HfO2 (next to blocking oxide) serving as part of blocking oxide reduces the current tunneling out of/in the charge trapping layer during program and erase. Moreover, trapped charge centroid is modulated and contributed more to the flat-band voltage shift. Further experiments prove that devices with a thicker 2nd HfO2 layer exhibit larger saturate flat-band shift in both program and erase operation. The optimized device achieves a 7 V memory window and good reliability characteristics.
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Received: 26 April 2015
Published: 02 September 2015
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