CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY |
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Numerical Simulation of 4H-SiC Metal Semiconductor Field Transistors |
Kuang-Po HSUEH1**, Shih-Tzung SU2, Jun ZENG2
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1Department of Electronics Engineering, Vanung University, Chung-Li 32061, Taiwan
2R&D Department, InPowerSemiconductor Corp., Ltd, Hong Kong
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Cite this article: |
Kuang-Po HSUEH, Shih-Tzung SU, Jun ZENG 2011 Chin. Phys. Lett. 28 078502 |
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Abstract This work simulates the performance of 4H-SiC MESFETs and establishes the optimum device structure for dc and rf applications that operate at high voltages. Devices with various channel doping, buffer layer doping, recess thickness, gate-to-drain spacing and temperatures of operation are considered. The simulation results reveal that a p-type buffer layer of 5×1015 cm−3 and a channel layer of 1×1017 cm−3 yield favorable results. The cut-off frequency is 22.53 GHz, the maximum transconductance is 50.55 mS/mm, the drain saturation current is 239.76 mA/mm and the breakdown voltage is 70.40 V. The breakdown voltages increase to 90.2 V as the gate-to-drain spacing increases to 1 µm. Based on these simulation results, new 4H-SiC MESFET designs can be calibrated.
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Keywords:
85.30.Tv
85.30.De
85.30.z
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Received: 28 March 2011
Published: 29 June 2011
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PACS: |
85.30.Tv
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(Field effect devices)
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85.30.De
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(Semiconductor-device characterization, design, and modeling)
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85.30.z
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