2010, Vol. 27(6): 67201-067201 DOI: 10.1088/0256-307X/27/6/067201 | ||
Improved Programming Efficiency through Additional Boron Implantation at the Active Area Edge in 90nm Localized Charge-Trapping Non-volatile Memory | ||
XU Yue1,3, YAN Feng1, CHEN Dun-Jun1, SHI Yi1, WANG Yong-Gang2, LI Zhi-Guo2, YANG Fan2, WANG Jos-Hua2, LIN Peter2, CHANG Jian-Guang2 |
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1Department of Physics, Nanjing University, Nanjing 210093 2Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai 201203 3College of Electronic Science and Engineering, Nanjing University of Posts and Telecommunications, Nanjing 210003 | ||
收稿日期 2010-01-15 修回日期 1900-01-01 | ||
Supporting info | ||
[1] Machala C, Wise R, Mercer D and Chatterjee A 1997 International Conference on Simulation of Semiconductor Processes and Device (Piscataway USA 8-10 September 1997) p 141 |
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