Memory Effect of Metal--Insulator--Silicon Capacitors with SiO₂/HfO₂/Al₂O₃ Dielectrics

Charge trapping characteristics of the metal--insulator--silicon (MIS) capacitors with SiO₂/HfO₂/Al₂O₃ stacked dielectrics are investigated for memory applications. A capacitance-voltage hysteresis memory window as large as 7.3V is achieved for the gate voltage sweeping of ±12V, and a flat-band voltage shift of 1.5V is observed in terms of programming under 5V and 1ms.Furthermore, the time- and voltage-dependent charge trapping
characteristics are also demonstrated, the former is related to charge trapping saturation and the latter is ascribed to variable tunnelling barriers for electron injecting and discharging under different voltages.