Fabrication of Nanoimprint Stamp Using Interference Lithography

Interference lithography is used to fabricate a nanoimprint stamp, which is a key step for nanoimprint lithography. A layer of chromium in thickness of about 20nm is deposited on the newly cleaned fused silica substrate by thermal evaporation, and a layer of positive resist in thickness of 150nm is spun on the chromium layer. Some patterns, including lines, holes and pillars, are observed on the photoresist film by exposing the resist to interference patterns and they are then transferred to the chromium layer by wet etching. Fused silica stamps are fabricated by reactive ion etching with CHF₃/O₂ as
etchants using the chromium layer as etch mask. An atomic force microscope is used to analyse the pattern transfer in each step. The results show that regular hole patterns of fused silica, with average full width 143nm at half maximum (FWHM), average hole depth of 76nm and spacing of 450nm, have been fabricated. The exposure method is fast, inexpensive and applicable for fabrication of nanoimprint stamps with large areas.