Enhanced Total Ionizing Dose Hardness of Deep Sub-Micron Partially Depleted Silicon-on-Insulator n-Type Metal-Oxide-Semiconductor Field Effect Transistors by Applying Larger Back-Gate Voltage Stress

The larger back-gate voltage stress is applied on 130 nm partially depleted silicon-on-insulator n-type metal-oxide-semiconductor field-effect transistors isolated by shallow trench isolation. The experimental results show that the back-gate sub-threshold hump of the device is eliminated by stress. This observed behavior is caused by the high electric field in the oxide near the bottom corner of the silicon island. The total ionizing dose hardness of devices with pre back-gate stress is enhanced by the interface states induced by stress.