The Leakage Current Improvement of a Ni-Silicided SiGe/Si Junction Using a Si Cap Layer and the PAI Technique

We investigate the leakage current of ultra-shallow Ni-silicided SiGe/Si junctions for 45 nm CMOS technology using a Si cap layer and the pre-amorphization implantation (PAI) process. It is found that with the conventional Ni silicide method, the leakage current of a p⁺(SiGe)–n(Si) junction is large and attributed to band-to-band tunneling and the generation-recombination process. The two leakage contributors can be suppressed quite effectively when a Si cap layer is added in the Ni silicide method. The leakage reduction is about one order of magnitude and could be associated with the suppression of the agglomeration of the Ni germano-silicide film. In addition, the PAI process after the application of a Si cap layer has little effect on improving the junction leakage but reduces the sheet resistance of the silicide film. As a result, the novel Ni silicide method using a Si cap combined with PAI is a promising choice for SiGe junctions in advanced technology.