Chinese Physics Letters, 2019, Vol. 36, No. 6, Article code 067202 Full-Quantum Simulation of Graphene Self-Switching Diodes Ashkan Horri1**, Rahim Faez2 Affiliations 1Department of Electrical Engineering, Arak Branch, Islamic Azad University Arak, Iran 2Department of Electrical Engineering Tehran, Sharif University of Technology, Iran Received 21 January 2019, online 18 May 2019 **Corresponding author. Email: a-horri@iau-arak.ac.ir Citation Text: Horri A and Faez R 2019 Chin. Phys. Lett. 36 067202    Abstract We present a quantum study on the electrical behavior of the self-switching diode (SSD). Our simulation is based on non-equilibrium Green's function formalism along with an atomistic tight-binding model. Using this method, electrical characteristics of devices, such as turn-on voltage, rectification ratio, and differential resistance, are investigated. Also, the effects of geometrical variations on the electrical parameters of SSDs are simulated. The carrier distribution inside the nano-channel is successfully simulated in a two-dimensional model under zero, reverse, and forward bias conditions. The results indicate that the turn-on voltage, rectification ratio, and differential resistance can be optimized by choosing appropriate geometrical parameters. DOI:10.1088/0256-307X/36/6/067202 PACS:72.80.Vp, 85.35.-p, 85.30.De © 2019 Chinese Physics Society Article Text The realization of graphene-based diodes and transistors has received a great deal of attention.[1–3] High-performance diodes will enable next-generation terahertz detectors and new rf systems, and their realization at nanoscale with high operation frequency has been a challenge. Terahertz detectors are useful for the detection of millimeter and sub-millimeter waves avoiding the use of x-rays.[4] In this Letter, we simulate a nanometer-scale structure, which is referred to as a self-switching diode (SSD). An SSD is an asymmetrical nanowire in which rectification occurs due to a self-induced field effect that enhances conduction through the nanowire in one direction, while suppressing it in the opposite direction.[5] The current–voltage ($I$–$V$) characteristics of SSDs are similar to those of a conventional diode, but the turn-on voltage can be tuned by changing the designed device geometries. Unlike a conventional diode, neither a doping junction nor a tunneling barrier is needed in an SSD for its nonlinear property. SSDs were previously realized on three-dimensional bulk materials such as compound semiconductor heterostructures,[6] silicon-on-insulator (SOI) wafers,[7] indium tin oxide,[8] and zinc oxide thin films,[9] and have shown a great potential for high-speed operation, achieving terahertz detection at room temperature. Two-dimensional materials greatly simplify the SSD fabrication process. Based on this, graphene SSDs (G-SSDs) have been proposed in theory[10,11] and realized in experiments, showing promising performance.[12,13] Previous studies on graphene and silicene SSDs have shown that SSDs with armchair nanoribbon channels achieve rectification, while SSDs with zigzag nanoribbons channels do not.[10,14] An analysis of the effects of the geometrical variations is necessary to find the optimum geometry that meets the desired SSD $I$–$V$ response, which is the aim of this work. We analyze the electrical properties of SSD by variations of the channel width and trench length. We use non-equilibrium Green's function (NEGF) formalism combined with a tight-binding (TB) method to calculate the electronic characteristics of SSDs. Using this method, the turn-on voltage, rectification ratio, and differential resistance of SSDs are investigated. As shown in Fig. 1, an SSD is formed by etching two L-shaped trenches back-to-back forming a narrow nano-channel between them, through which conduction occurs. The conductance of this graphene nano-channel is controlled by a field effect, which is applied by two side gates surrounding the channel, and these are connected to one of the two terminals of the device. In this structure, the nano-channel in the SSD is a graphene nanoribbon (GNR) and to control the conductance of the channel by an electric field, it needs to be semiconducting. This is achieved by an armchair GNR. In this structure, the side gates are also semiconducting. The fabrication process requires only two patterning steps: one for defining the device and the L-shaped trenches, and one for defining the contacts.
cpl-36-6-067202-fig1.png
Fig. 1. Top view of the graphene SSD showing the L-shaped insulating trenches and nano-channel.
Under the TB approximation, the Hamiltonian of the system in the real-space basis is[15] $$ H=\sum_i\varepsilon_i|i\rangle\langle i|-\sum_{i,j}t_{i,j}(|i\rangle\langle j|),~~ \tag {1} $$ where $\langle i,j\rangle$ denotes the nearest neighbors, $\varepsilon_i$ is the sum of on-site energy and the electrostatic potential energy of $i$th atoms, and $t_{i,j}$ is the nearest-neighbor hopping energy. Following the derivation of the TB Hamiltonian, we can proceed to solve a set of stationary NEGF equations to compute observable physical properties such as charge density and terminal current[15] $$ G(E)=[(E+i0^+)I-H-{\it \Sigma}_{\rm S}-{\it \Sigma}_{\rm D}]^{-1}.~~ \tag {2} $$ Within the device, the source (drain) local density of states (LDOS) is $D_{\rm S(D)}=G{\it \Gamma}_{\rm S(D)}G^†$, where ${\it \Gamma}_{\rm S(D)}=i({\it \Sigma}_{\rm S(D)}-{\it \Sigma}_{\rm S(D)}^†)$ is the energy level broadening due to the source (drain) contact. The electron (hole) density within the device is computed by integrating the LDOS, weighted by the appropriate Fermi level over energy. The electron (hole) density contributed by the source and drain contacts is[15] $$\begin{alignat}{1} p_{\rm 3D}=\,&\frac{1}{\Delta V}[\int_{-\infty}^{E_{\rm NS}}D_{\rm S}(E)(1-f(E-E_{\rm FS})) \\ &+\int_{-\infty}^{E_{\rm ND}} D_{\rm D}(E)(1-f(E-E_{\rm FD}))],~~ \tag {3} \end{alignat} $$ $$\begin{alignat}{1} n_{\rm 3D}=\,&\frac{1}{\Delta V}[\int_{E_{\rm NS}}^\infty D_{\rm S}(E)f(E-E_{\rm FS})\\ &+\int_{E_{\rm ND}}^\infty D_{\rm D}(E)f(E-E_{\rm FD})],~~ \tag {4} \end{alignat} $$ where $E_{\rm FS}$ ($E_{\rm FD}$) is the source (drain) Fermi level and $E_{\rm NS}$ ($E_{\rm ND}$) is the charge neutrality level at the source (drain) region, $n_{\rm 3D}$ and $p_{\rm 3D}$ are the electron and hole densities, respectively, and $\Delta V$ is the mesh volume. After solving the Green function equations and evaluating the charge density in the GNR, the charge density is then put into the Poisson equation to compute the electrostatic potential. Instead of using the linear Poisson equation to compute the electrostatic potential, a nonlinear form of Poisson's equation has been used to achieve faster convergence. This has been achieved by introducing exponential terms, which is essentially a Gummel-type damping strategy. The resulting nonlinear Poisson equation has the form[16] $$\begin{align} \nabla^2\phi^k=\,&\frac{-q}{\varepsilon}(N_{\rm D}-N_{\rm A}-n_{\rm 3D}^{k}e^{\frac{(\phi_k-\phi_{k-1})}{K_{\rm B}T}}\\ &+p_{\rm 3D}^{k}e^{\frac{-(\phi_k-\phi_{k-1})}{K_{\rm B}T}}),~~ \tag {5} \end{align} $$ where $\phi^k$, $p_{\rm 3D}^k$, and $n_{\rm 3D}^K$ are the $k$th self-consistent step solution for the potential, hole density, and electron density, respectively. The free boundary condition (Neumann) is applied to boundaries including the cathode and anode regions. The updated potential is input into the NEGF equations again. This self-consistent procedure is performed until convergence occurs. Figure 2 gives the simulation procedure as described above, in which the loop links the electrostatic potential to the charge density. Finally, the current between contacts is calculated by $$\begin{align} I(V)=\,&\frac{2e}{h}\int_{-\infty}^\infty T(E,V)[f_0(E-E_{\rm FS})\\ &-f_0(E-E_{\rm FD})]dE,~~ \tag {6} \end{align} $$ where $T(E,V)={\rm Tr}({\it \Gamma}_{\rm S}G{\it \Gamma}_{\rm D}G^†)$ is the transmission probability of incident electrons with energy $E$ from source to drain, and $f_0(E-E_{\rm FS(FD)})$ is the Fermi–Dirac distribution function of electrons in the source and drain regions, respectively.
cpl-36-6-067202-fig2.png
Fig. 2. Flowchart of the simulation procedure.
cpl-36-6-067202-fig3.png
Fig. 3. The SSD charge spatial distribution under different bias conditions, and $a_0$ is the carbon–carbon bond length in graphene.
The charge density in the device, $\rho=q(p_{\rm 3D}-n_{\rm 3D})$, is shown in Figs. 3(a)–3(d) under different bias conditions. According to Fig. 3(c), under the no bias condition, there are negative charges (electrons) at the cathode side of the channel while the charges at the anode side are positive (holes). For instance, we observe that $\rho$ increases along the length of the channel, and decreases steadily closer to the groove walls. Indeed, depletion regions are formed around these insulating trenches as a consequence of the repulsion of charges coming on either side of the trenches. The zero-bias simulations indicate that there is a threshold carrier concentration, which propitiates the formation of the depletion region. When the anode electrode is set to a negative voltage while the cathode electrode is grounded, a reverse bias is established, and the channel charge density is reduced as shown in Fig. 3(d). Therefore, a strong depletion occurs. This state can be considered as a pinch-off condition since the absence of free carriers prevents any current from flowing across the channel. The SSD charge spatial distribution at forward bias is displayed in Figs. 3(a) and 3(b). The forward bias is established when the positive terminal of the applied voltage is connected to the anode. For voltage greater than $V_{\rm ON}$, which depends on the device geometry, the depletion region is reduced. Applying a reverse bias depletes charges in the channel and therefore prevents current flow. Reverse current can be produced if the magnitude of the reverse bias in the anode electrode is further increased. In Fig. 3(d), the charge distribution at reverse bias is displayed where a strong depletion is presented and $\rho$ is reduced in comparison with the zero bias condition as shown in Fig. 3(c). A forward bias would remove the depletion region by increasing the hole concentration in the channel, and therefore enhance forward conduction. This effect would result in rectification, which is observable from the nonlinear $I$–$V$ characteristics.
cpl-36-6-067202-fig4.png
Fig. 4. The $I$–$V$ characteristics of the graphene SSD.
Table 1. Electrical characteristic of SSDs with different geometries.
Type of device Rectification ratio Forward differential resistance (${\Omega}$) On-voltage (V)
$W_{\rm ch}=0.61$ nm and $L_{\rm Tr}=3.4$ nm 8.31 433.5 K 1.5
$W_{\rm ch}=1.1$ nm and $L_{\rm Tr}=3.4$ nm 155.42 64.5 K 1.02
$W_{\rm ch}=1.1$ nm and $L_{\rm Tr}=2.27$ nm 428 62.5 K 1.03
cpl-36-6-067202-fig5.png
Fig. 5. The SSD charge spatial distribution under different geometry conditions: (a) $W_{\rm ch}=0.61$ nm and $L_{\rm Tr}=3.4$ nm, (b) $W_{\rm ch}=1.1$ nm, and $L_{\rm Tr}=2.27$ nm, and (c) $W_{\rm ch}=1.1$ nm and $L_{\rm Tr}=3.4$ nm.
It is found that a forward bias narrows down the depletion region, opening the channel and enhancing forward conduction, but applying a reverse bias increases the depletion region and thus reduces the current flow. Figure 4 shows the $I$–$V$ characteristics for the SDD with different geometries. The point at which the conductance begins to rise abruptly is the turn-on voltage of the device, at which the channel is expected to open. Once the channel is open, increasing the bias voltage greatly increases the conductance, due to the effect of the self-induced field applied by the side gates. It is observed that channel width affects the turn-on voltage. Also, it is found that differential resistance takes low values at positive bias due to the small depletion region of the SSD, while at negative bias it becomes higher. The calculated maximum forward-to-reverse current rectification ratio is calculated according to the equation $$ {\rm Rectification ratio}_{\rm max}=\max\Big[\frac{I(+V)}{I(-V)}\Big].~~ \tag {7} $$ The differential resistance, turn-on voltage, and rectification ratio are listed in Table 1, which shows that SSDs with a wider channel turn on at lower voltage, have lower resistance, and have a higher rectification ratio. The results confirm that the turn-on voltage can be tuned simply by changing the channel width. Figure 5 shows the charge spatial distribution under different geometry conditions. Indeed, as the channel width increases, higher carrier concentration leads to stronger nonlinearity and enhanced responsibility. Indeed, from previous results on graphene band structures,[17,18] it is found that the increase of graphene width leads to a lower bandgap. In this case, more and more channels are involved in the electronic transport leading to the reduction of the turn-on voltage. Therefore, the wider the channel width, the lower the turn-on voltage. Also, Table 1 indicates that SSDs with a shorter trench length have a higher rectification ratio, and have negligible effect on the turn-on voltage and differential resistance. Indeed, the conductance changes little with increasing the length due to ballistic transport, which coincides with previous studies.[17,18] Also, in the comparison of Figs. 5(b) and 5(c), we observe that the channel with shorter length has lower carrier concentrations, and hence a stronger pinch-off condition. Therefore at shorter trench length, we observe lower reverse current and hence higher rectification ratio. It is worth commenting that for SSDs intended to work at terahertz frequencies, it is necessary to reduce the carrier's time of flight between electrodes. This can be achieved by improving the electron mobility, increasing the carrier's mean free path, or decreasing the channel length, since, at terahertz frequencies, the electron transport is now in the ballistic regime. Therefore, the high-frequency performance is achieved not only due to the shorter channel length but also due to the enhanced electron velocity associated with ballistic transport. In this work, a graphene SSD is proposed as a nano-rectifier and is investigated using NEGF formalism along with a TB model. The self-switching field effect mechanism results in the enhancement of forward current and the suppression of reverse current. It is demonstrated that by choosing appropriate geometrical parameters, the turn-on voltage, rectification ratio, and differential resistance can be optimized. We find that widening the channel can enable stronger control over the channel's conductivity while widening the channel allows a lower turn-on voltage. Increasing the length of the channel enhances the rectification ratio but has negligible effect on the turn-on voltage. These results suggest that graphene SSDs may have exciting applications in next-generation rf systems, terahertz detectors, and flexible electronics. Investigation of the doping concentration of graphene on the electrical characteristics of SSDs is recommended for future works.
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