⇦Chinese Physics Letters, 2019, Vol. 36, No. 3, Article code 037301 Chemical Vapor Deposition Growth of Large-Area Monolayer MoS$_{2}$ and Fabrication of Relevant Back-Gated Transistor * Jian-Ying Chen (陈建颖)1, Lu Liu (刘璐)1, Chun-Xia Li (李春霞)2**, Jing-Ping Xu (徐静平)1** Affiliations 1School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074 2Shenzhen Institution of Information Technology, Shenzhen 518172 Received 4 December 2018, online 23 February 2019 *Supported by the National Natural Science Foundation of China under Grant No 61774064.
**Corresponding author. Email: jpxu@hust.edu.cn; licx@sziit.edu.cn Citation Text: Chen J Y, Liu L, Li C X and Xu J P 2019 Chin. Phys. Lett. 36 037301    Abstract A closed two-temperature-zone chemical vapor deposition (CVD) furnace was used to grow monolayer molybdenum disulfide (MoS$_{2}$) by optimizing the temperature and thus the evaporation volume of the Mo precursor. The experimental results show that the Mo precursor temperature has a large effect on the size and shape transformation of the monolayer MoS$_{2}$, and at a lower temperature of $ < $760$^{\circ}\!$C, the size of the triangular MoS$_{2}$ increases with the elevating temperature, while at a higher temperature of $>$760$^{\circ}\!$C, the shape starts to change from a triangle to a truncated triangle. A large-area triangular monolayer MoS$_{2}$ with a side length of 145 μm is achieved at 760$^{\circ}\!$C. Further, the as-grown monolayer MoS$_{2}$ is used to fabricate back-gated transistors by means of electron beam lithography to evaluate the electrical properties of MoS$_{2}$ thin films. The MoS$_{2}$ transistors with monolayer MoS$_{2}$ grown at 760$^{\circ}\!$C exhibit a high on/off current ratio of 10$^{6}$, a mobility of 1.92 cm$^{2}$/Vs and a subthreshold swing of 194.6 mV/dec, demonstrating the feasible approach of CVD deposition of monolayer MoS$_{2}$ and the fabrication of transistors on it. DOI:10.1088/0256-307X/36/3/037301 PACS:73.63.Bd, 72.80.Vp, 74.25.nd © 2019 Chinese Physics Society Article Text Two-dimensional materials such as graphene and transition metal dichalcogenides (TMDs)[1,2] have attracted great attention because of their unique features compared with conventional bulk materials. Molybdenum disulfide (MoS$_{2}$), as a TMD, has an adjustable band gap and high on/off ratio compared with graphene, which means that photoelectric devices based on a back-gated MoS$_{2}$ transistor have broadband spectrum detection, lower dark current and high photoresponsivity.[2] There have been many reports on the fabrication of MoS$_{2}$ thin film, with micro-exfoliation being one of the earliest ways to prepare it.[3-5] However, exfoliation is not a reliable fabrication method as the size and thickness of the produced MoS$_{2}$ flakes are uncontrollable. As an alternative, the chemical vapor deposition (CVD) method was employed and has been demonstrated to produce large-area and high-quality MoS$_{2}$ films.[6-11] The sulfurization of solid molybdenum trioxide (MoO$_{3}$) is the most common mechanism of CVD synthesizing MoS$_{2}$. Yet, the CVD growth of MoS$_{2}$ is influenced by many factors. Yang et al. reported a systematical study of low-pressure CVD growth of high-quality crystals of monolayer MoS$_{2}$.[12] Cao et al. investigated the influence of Ar flow rate on the morphology evolution.[13] Wang et al. used the shape transformation model to explain the shape change during the growth of MoS$_{2}$ thin films by CVD.[14] Xie et al. used MoO$_{2}$ as a precursor to grow large-area and high-quality monolayer MoS$_{2}$.[15] All of the above works were performed by placing S and Mo sources in a single temperature-zone furnace tube without considering the effects of their respective temperature. In a closed environment, the amount of reactants is mainly determined by the evaporation temperature, and changing the precursor temperature can affect the area of CVD-deposited thin films.[16] By heating S and Mo sources separately in the tube, the reaction between S and Mo sources can be accurately controlled. Usually, the observed edge structures for the MoS$_{2}$ flakes are Mo zigzag (Mo-zz) and S zigzag (S-zz) terminations, which are supposed to be the most energetically stable structures. As reported, the shape of the monolayer MoS$_{2}$ results from the two types of zigzag edge terminations and can be changed by varying the amount of S and Mo sources.[17] Therefore, in this work, the effects of temperature on the growth of monolayer MoS$_{2}$ are investigated using a two-temperature-zone furnace tube and keeping the S source temperature unchanged and changing the Mo source temperature, so as to control the amount of supplied Mo precursor. The shape of the MoS$_{2}$ film is changed from a triangle to a truncated triangle when a large quantity of Mo precursor is provided. By optimizing the temperature, a large scale of over 120 µm or even 145 µm MoS$_{2}$ triangular islands are formed at a Mo source temperature of 760$^{\circ}\!$C and an S source temperature of 220$^{\circ}\!$C. Various microanalysis techniques are employed to characterize the structure, thickness and morphologies of the as-grown MoS$_{2}$ thin films, including Raman and photoluminescence (PL) spectra, atomic force microscopy (AFM) and scanning electron microscopy (SEM). The shape transformation is explained using the dependence on the atom ratio of Mo to S, which can provide a practical guide for growing large-area MoS$_{2}$ thin films. Finally, back-gated transistors based on the as-grown monolayer MoS$_{2}$ are fabricated to evaluate the electrical properties of the devices. Heavily doped p$^{+}$ silicon with a resistivity of $\sim$0.01 $\Omega\cdot$cm was used as the starting substrate. 30 nm SiO$_{2}$ was thermally grown on the Si substrate by dry oxidation. Prior to the MoS$_{2}$ growth, the SiO$_{2}$/Si substrate was treated by oxygen plasma with a power of 60 W for 5 min, followed by CVD MoS$_{2}$ growth in a two-zone furnace system as shown in Fig. 1(a). An alumina boat with 500 mg S powders (99.99% Aladdin) was placed upstream in the low-temperature zone. Another alumina boat containing 5 mg MoO$_{3}$ powders (Ourchem) was placed downstream in the high-temperature zone. The SiO$_{2}$/Si target substrate of 12 mm $\times$ 12 mm was face down placed on the top of the MoO$_{3}$ boat. The distance between the two alumina boats was 20 cm. This long distance was to ensure that the S vapor concentration gradient on the SiO$_{2}$/Si substrate could be ignored, as compared with the MoO$_{3}$ concentration gradient. The S and MoO$_{3}$ sources were heated to 220$^{\circ}\!$C and 720$^{\circ}\!$C–780$^{\circ}\!$C, respectively, under 100 sccm $N_{2}$ carrier gas. Figure 1(b) shows the temperature programming process of the MoO$_{3}$ and S precursors. After keeping the temperature for 1 min, the furnace was naturally cooled down to room temperature. Raman and PL spectra were collected by a Horiba LabRAM HR 800 Raman microscopic system, where the power of the solid-state excitation laser was 0.5 mW with a wavelength of 532 nm and a 100$\times$ objective was used to focus the laser beam. The SEM images were taken by a Gemini SEM 300-71-12 with an accelerating voltage of 10 kV. The shape and thicknesses of the MoS$_{2}$ thin film were characterized by an AFM (Bruker Dimension Edge SPM System). The as-grown MoS$_{2}$ triangular islands were used to fabricate the back-gated transistors using electron beam lithography. Poly(methyl methacrylate) and methyl methacrylate were spin-coated on the MoS$_{2}$ thin film successively, followed by 150$^{\circ}\!$C baking. After pattern writing and development, Cr/Au (10/50 nm) were deposited by electron beam evaporation, and then an anneal was performed at 300$^{\circ}\!$C for 10 min in 95%N$_{2}$+5%H$_{2}$ atmosphere to reduce the contact resistance between the Cr/Au and MoS$_{2}$. The current–voltage ($I$–$V$) curve of the devices was measured using a Keithley4200-SCS parameter analyzer at room temperature in a dark ambient circumvent.
cpl-36-3-037301-fig1.png
Fig. 1. (a) CVD furnace setup for the MoS$_{2}$ growth, and (b) the temperature programming process of MoO$_{3}$ and S precursors.
Figures 2(a) and 2(b) show the optical and SEM images of those MoS$_{2}$ triangular islands synthesized at a Mo source temperature of 760$^{\circ}\!$C, where the largest side length is 146 µm. Figure 2(c) shows the AFM image of the MoS$_{2}$ triangular islands. Its step height is $\sim$0.65 nm (Fig. 2(d)) along the black line in Fig. 2(c), which is consistent with the thickness of the monolayer MoS$_{2}$ grown on a SiO$_{2}$/Si substrate.[18] Further, the Raman spectrum is analyzed to confirm the MoS$_{2}$ structure. As shown in Fig. 2(e), two characteristic Raman vibration modes can be observed, where the $E^{1}_{\rm 2g}$ mode represents the in-plane vibration molybdenum and the $A_{\rm 1g}$ mode is related to the out-of-plane vibration of sulfur atoms.[19] The peak difference between these two modes depends on the layer number of MoS$_{2}$. It can be seen that these two modes are located at 384.1 cm$^{-1}$ and 404.9 cm$^{-1}$, respectively, with a difference of $\Delta k=20.8$ cm$^{-1}$ ($\Delta k=A_{\rm 1g}-E^{1}_{\rm 2g})$, which agrees well with that of the CVD-grown monolayer MoS$_{2}$.[7-10,18-20] Also, the PL spectrum of the MoS$_{2}$ thin film is measured as shown in Fig. 2(f). The sharp peak is located at 1.87 eV, which is consistent with the band gap of the monolayer MoS$_{2}$.
cpl-36-3-037301-fig2.png
Fig. 2. (a) Optical image of MoS$_{2}$ triangular islands, (b) SEM image of MoS$_{2}$ triangular islands, (c) AFM image of the MoS$_{2}$ triangular islands, (d) its step height along the black line in (c), (e) Raman spectrum and (f) PL spectrum of MoS$_{2}$ triangular island.
In fact, the monolayer MoS$_{2}$ needs a process from nucleation to growth. Figure 3 shows the SEM images of MoS$_{2}$ thin films grown on SiO$_{2}$/Si substrates at different Mo precursor temperatures of 720$^{\circ}\!$C, 740$^{\circ}\!$C, 760$^{\circ}\!$C and 780$^{\circ}\!$C. In all cases, the shape of most MoS$_{2}$ thin films is triangular and their sizes become gradually larger as the temperature increases from 720$^{\circ}\!$C to 760$^{\circ}\!$C. Actually, the growth of the triangular MoS$_{2}$ requires sufficient sulfur atmosphere.[8,13,15,20] Cheng et al. reported that the MoS$_{2}$ thin film with a triangle shape is usually developed when the growth rate of Mo-zz is at least three times faster than that of S-zz in the initial hexagonal nuclei.[21] The relatively low growth temperatures (720$^{\circ}\!$C, 740$^{\circ}\!$C, 760$^{\circ}\!$C) lead to an S-rich atmosphere (Mo:S $ < $ 1:2), so that the MoS$_{2}$ thin film grows into a triangle shape. As the Mo precursor temperature increases, more unsaturated Mo atoms can be provided and have higher probability of meeting and bonding with free S atoms in the S-sufficient atmosphere, which is beneficial for the growth of large-size MoS$_{2}$ triangular islands. The size of the triangles is $\sim30$ µm at 720$^{\circ}\!$C (Fig. 3(a)) and $\sim50$ µm at 740$^{\circ}\!$C (Fig. 3(b)), while at 760$^{\circ}\!$C (Fig. 3(c)), the size reaches more than 120 µm. When the temperature is increased to 780$^{\circ}\!$C (Fig. 3(d)), the MoS$_{2}$ triangles start stacking and their shape is changed from a triangle to a truncated triangle. According to Ref. [20] to grow MoS$_{2}$ by the CVD method, MoO$_{3}$ should firstly be reduced to volatile MoO$_{3-x}$ by S molecules: MoO$_{3}$+$(x/2)$S$\to$MoO$_{3-x}$+$(x/2)$SO$_{2}$. At a relatively high growth temperature, a great amount of MoO$_{3-x}$ (Mo:S $>$ 1:2) is produced according to the above equation, resulting in the reaction in a relatively S-deficient atmosphere. This increase of MoO$_{3-x}$ not only causes the shape evolution but also explains the development of a merged state in the MoS$_{2}$ thin film. Figure 4 shows the PL spectrum of the truncated triangular MoS$_{2}$ thin film, and an obvious left shift of the peak relative to the monolayer can be seen, which is located at 1.83 eV, implying the increase of MoS$_{2}$ thickness. The above results suggest that the Mo source temperature plays a key role in CVD MoS$_{2}$ growth, since different temperatures provide different amounts of precursors. At lower temperatures of $ < $760$^{\circ}\!$C, the Mo precursor temperature can be appropriately raised to increase the amount of the Mo source, which is conducive to the formation of large-size MoS$_{2}$ triangular islands.
cpl-36-3-037301-fig3.png
Fig. 3. SEM images of MoS$_{2}$ triangles synthesized on SiO$_{2}$/Si substrates with Mo precursor temperature at (a) 720$^{\circ}\!$C, (b) 740$^{\circ}\!$C, (c) 760$^{\circ}\!$C, and (d) 780$^{\circ}\!$C.
The above as-grown monolayers of MoS$_{2}$ are used to fabricate back-gated transistors to evaluate its electrical properties. Figure 5(a) shows the cross-sectional diagram of the MoS$_{2}$ field-effect transistors (FETs) and Fig. 5(b) is an AFM image of the drawn transistor on the MoS$_{2}$ triangular islands with a channel width/length of $W/L=9$ µm/5 µm ($W$ is an average value). The source/drain (S/D) regions are completely covered by the contacted metals, and the 3-nm-thick thermal SiO$_{2}$ acts as the gate dielectric. Gate bias is applied to the p$^{+}$-Si substrate to modulate the device, and electrical measurements are conducted under a light-tight and electrically shielded condition at room temperature.
cpl-36-3-037301-fig4.png
Fig. 4. PL spectrum of the truncated triangular MoS$_{2}$ thin film.
cpl-36-3-037301-fig5.png
Fig. 5. (a) Structural diagram of the back-gated MoS$_{2}$ transistor and (b) AFM image of the transistor fabricated on the triangular MoS$_{2}$ island.
Figures 6(a) and 6(b) show the transfer characteristic (drain current ($I_{\rm dS}$) versus gate voltage ($V_{\rm G}$)) at $V_{\rm dS}=3$ V and 5 V in linear and semi-logarithmic scales, respectively, for the transistor with monolayer MoS$_{2}$ as the channel grown at 760$^{\circ}\!$C. The device exhibits a low-off current (10$^{-12}$ A) with an on/off current ratio up to 10$^{6}$. Figures 6(c) and 6(d) exhibit the output characteristic curves of the MoS$_{2}$ transistor under small $V_{\rm dS}$ from $-$0.1 to +0.1 V and large $V_{\rm dS}$ up to 3 V to demonstrate its linearity and driving capability, respectively. It can be seen that an approximate linear relationship between $I_{\rm dS}$ and $V_{\rm dS}$ is observed when $V_{\rm dS}$ changes from $-$0.1 V to 0.1 V for $V_{\rm G}$ from 18 V to 30 V, indicating a non-ideal ohmic contact between the metal and MoS$_{2}$. An unavoidable problem in the CVD MoS$_{2}$ is that the incomplete reacted MoO$_{3}$ may remain on the MoS$_{2}$ thin films when the CVD stops, which increases contact resistance and leads to a non-ideal ohmic contact. In addition, some deep traps between the as-grown MoS$_{2}$ and SiO$_{2}$ could be introduced, which could capture some electrons in the channel as $V_{\rm dS}$ increases and induces current collapse phenomena,[22] e.g. negative differential resistance effect, as shown in Fig. 6(d). The carrier mobility of the back-gated MoS$_{2}$ FETs was extracted using the formula $\mu=(\Delta I_{\rm dS}/\Delta V_{\rm G})\times(L/WC_{\rm ox}V_{\rm dS})$, where $C_{\rm ox}$ is the gate capacitance per unit area, and $\Delta I_{\rm dS}/\Delta V_{\rm G}$ is the slope of the transfer curve in the linear region. The field-effect mobility of the as-grown MoS$_{2}$ transistor is calculated to be 1.92 cm$^{2}$/Vs, which is a low value due to the large S/D contact resistances, as mentioned above. In addition, the extracted subthreshold swing (SS) has a relatively small value of 194.6 mV/dec. The electrical properties of other transistors with monolayer MoS$_{2}$ grown at 720$^{\circ}\!$C or 740$^{\circ}\!$C are summarized in Table 1. Obviously, the transistor with monolayer MoS$_{2}$ grown at 760$^{\circ}\!$C has the best electrical performance. It is worth noting that the electrical properties of the fabricated MoS$_{2}$ transistors, e.g. saturation current and carrier mobility, are not better than those reported in previous reports.[23-26] Except for the large S/D contact resistances, other causes probably include poorer interface quality between the MoS$_{2}$ and gate dielectric, and increased gate leakage due to the deterioration of the SiO$_{2}$ gate dielectric during the MoS$_{2}$ growth. Therefore, the S/D contact and interfacial optimizations are important in the future, and a transfer of the as-grown MoS$_{2}$ is also needed to obtain better device performances.
cpl-36-3-037301-fig6.png
Fig. 6. Transfer characteristics of the as-grown MoS$_{2}$ transistor: (a) in linear scale and (b) in logarithmic scales ($V_{\rm dS}=3$ V and 5 V respectively). Output characteristics of the as-grown MoS$_{2}$ transistor: (c) small range of $V_{\rm dS}$ from $-$0.1 V to 0.1 V and (d) large range of $V_{\rm dS}$ from 0 V to 3 V ($V_{\rm G}$ from 18 V to 30 V with a step of 3 V).
Table 1. Performance of devices with different size monolayer MoS$_{2}$ as channel grown at different temperatures.
Temperature Mobility SS On/off ratio
(cm$^{2}$/Vs) (mV/dec)
720$^{\circ}\!$C (10 µm) 0.24 464.2 10$^{6}$
740$^{\circ}\!$C (15 µm) 0.57 272.5 10$^{6}$
760$^{\circ}\!$C (20 µm) 1.92 194.6 10$^{6}$
In summary, the effects of the Mo precursor temperature on the size and shape of MoS$_{2}$ thin film have been investigated for CVD MoS$_{2}$. It is found that as the Mo precursor temperature rises from 720$^{\circ}\!$C to 760$^{\circ}\!$C, the size of the MoS$_{2}$ triangular islands gradually increases up to over 120 µm, to a maximum of 146 µm. When the temperature reaches 780$^{\circ}\!$C, the shape and thickness of the MoS$_{2}$ thin film are changed. The involved mechanisms lie in the change of the atomic ratio of S atoms to Mo atoms with the Mo precursor temperature: Mo:S $ < $ 1:2 for the temperature range of 720$^{\circ}\!$C–760$^{\circ}\!$C due to the S-rich atmosphere, resulting in the growth of triangular MoS$_{2}$ thin film whose size increases as the temperature increases owing to the increased Mo atoms and bonding probability with S atoms, and Mo:S $>$ 1:2 for high temperatures of $>760^{\circ}\!$C, e.g. 780$^{\circ}\!$C, due to the S-deficient atmosphere, leading to the stacking of the triangular MoS$_{2}$ islands into truncated triangles. AFM, SEM, Raman and PL spectra are used to characterize the MoS$_{2}$ thin film, and confirm its structure and monolayer thickness. Moreover, the as-grown MoS$_{2}$ triangular islands are used to fabricate back-gated transistors to evaluate their electrical properties. The transistors are n-channel enhancement-mode FETs, where the device with the monolayer MoS$_{2}$ grown at 760$^{\circ}\!$C exhibits the best electrical properties: a mobility of 1.92 cm$^{2}$/Vs and a subthreshold swing of 194.6 mV/dec, indicating the feasible approach of fabricating transistors on monolayer MoS$_{2}$ grown by the CVD method. Further optimization of growth processing and improvements of the S/D contact and MoS$_{2}$/dielectric interface are needed to obtain excellent electrical performances of the CVD-grown MoS$_{2}$ transistors. References Single-layer MoS2 transistorsUltrasensitive and Broadband MoS 2 Photodetector Driven by FerroelectricsSingle-Layer MoS 2 ElectronicsHigh Performance Multilayer MoS 2 Transistors with Scandium ContactsPreparation and Applications of Mechanically Exfoliated Single-Layer and Multilayer MoS 2 and WSe 2 NanosheetsLarge-Area Vapor-Phase Growth and Characterization of MoS 2 Atomic Layers on a SiO 2 SubstrateSynthesis of Large-Area MoS 2 Atomic Layers with Chemical Vapor DepositionShape Evolution of Monolayer MoS 2 Crystals Grown by Chemical Vapor DepositionChemical vapor deposition of monolayer MoS 2 directly on ultrathin Al 2 O 3 for low-power electronicsCarrier transport properties of MoS 2 field-effect transistors produced by multi-step chemical vapor deposition methodHigh mobility and high on/off ratio field-effect transistors based on chemical vapor deposited single-crystal MoS 2 grainsControlled synthesis of high-quality crystals of monolayer MoS2 for nanoelectronic device applicationInfluences of carrier gas flow rate on the morphologies of MoS2 flakesEffect of Mo concentration on shape and size of monolayer MoS 2 crystals by chemical vapor depositionControllable growth of monolayer MoS 2 by chemical vapor deposition via close MoO 2 precursor for electrical and optical applicationsA library of atomically thin metal chalcogenidesVapour phase growth and grain boundary structure of molybdenum disulphide atomic layersSubstrate control for large area continuous films of monolayer MoS 2 by atmospheric pressure chemical vapor depositionAnomalous Lattice Vibrations of Single- and Few-Layer MoS 2Effective shape-controlled growth of monolayer MoS2 flakes by powder-based chemical vapor depositionKinetic Nature of Grain Boundary Formation in As-Grown MoS 2 MonolayersElectronic transport and device prospects of monolayer molybdenum disulphide grown by chemical vapour depositionComputationally Efficient Multiple-Independent-Gate Device ModelConcurrent Synthesis of High-Performance Monolayer Transition Metal DisulfidesSeeded growth of highly crystalline molybdenum disulphide monolayers at controlled locationsUniversal Substrate-Trapping Strategy To Grow Strictly Monolayer Transition Metal Dichalcogenides Crystals
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