⇦Chinese Physics Letters, 2017, Vol. 34, No. 1, Article code 016103 Total-Ionizing-Dose-Induced Body Current Lowering in the 130 nm PDSOI I/O NMOSFETs Xiao-Nian Liu(刘小年)1,2**, Li-Hua Dai(戴丽华)1,2, Bing-Xu Ning(宁冰旭)1, Shi-Chang Zou(邹世昌)1 Affiliations 1State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050 2University of Chinese Academy of Sciences, Beijing 100049 Received 29 August 2016 **Corresponding author. Email: lxn@mail.sim.ac.cn Citation Text: Liu X N, Dai L H, Ning B X and Zou S C 2017 Chin. Phys. Lett. 34 016103 Abstract The body current lowering effect of 130 nm partially depleted silicon-on-insulator (PDSOI) input/output (I/O) n-type metal-oxide-semiconductor field-effect transistors (NMOSFETs) induced by total-ionizing dose is observed and analyzed. The decay tendency of current ratio of body current and drain current $I_{\rm b}/I_{\rm d}$ is also investigated. Theoretical analysis and TCAD simulation results indicate that the physical mechanism of body current lowering effect is the reduction of maximum lateral electric field of the pinch-off region induced by the trapped charges in the buried oxide layer (BOX). The positive charges in the BOX layer can counteract the maximum lateral electric field to some extent. DOI:10.1088/0256-307X/34/1/016103 PACS:61.80.Az, 61.80.Ed, 61.82.Fk © 2017 Chinese Physics Society Article Text Body current is a practical measurement method for the characterization of the impact ionization-induced weak level avalanche of MOS transistors.[1] For electronic devices in radiation environment, the damage mechanisms and the threshold voltage shift of the front gate of partially depleted silicon-on-insulator (PDSOI) devices have been studied.[2-6] When the drain terminal of an SOI MOSFET is biased to a high voltage, a relatively strong lateral electrical field is formed in the pinch-off region near the drain side. Thus impact ionization frequently occurs in the strong electrical field area. Most of these electrons generated are swept to the drain side and contribute to the drain current. Meanwhile holes are collected to the body area for its heavy equivalent mass. In this work, T-gate shaped body contact SOI NMOSFET layout (Fig. 1(a)) is used. Thus these holes will contribute to the body current through the p+ body contact. The number of hot carriers collected by the body relies on two aspects. A higher drain current can drive more carriers to the high lateral field area. A stronger lateral field can elevate the carriers' collision probability, thus making the generation of electron–hole pairs more efficient.[1,7] When the total-ionizing-dose (TID) effect of SOI MOSFET is considered, the drain current has slight change as the front gate channel is strongly inverse ($V_{\rm gs}=1$ V). As illustrated in Fig. 1(b), the holes trapped in the buried oxide layer (BOX) are presumed to be evenly distributed around the interface of the top silicon layer and BOX. Intuitively, for the opposite direction from the channel to the drain most of the charges right under the channel will counteract the lateral electric field near the drain side which is mainly induced by a relatively high voltage drop in the pinch-off region. Then, the decay of the lateral electric field leads to the decrease of the body current.[8] In this Letter, the decrease of the body current of T-gate 130 nm PDSOI I/O NMOSFET with the increase of the irradiation dose is observed. The TCAD simulation indicates that the lateral electric field is weakened by the TID-effect-induced holes in BOX. The mechanism of TID-induced body current lowering is analyzed.
cpl-34-1-016103-fig1.png
Fig. 1. The layout of T-gate SOI NMOSFET and the cross section view of the channel. (a) T-gate SOI NMOSFET layout, the body contact is realized by a p-type doped area at one side of the channel, and (b) cross section view of the channel region. The positive charges placed on the interface of the top silicon and the BOX layer are induced by the TID effect.
The I/O NMOSFETs in this work were fabricated by a 130 nm PDSOI 1-poly 7-metal logic process of Shanghai Huahong Grace Semiconductor Manufacturing Corporation. Base wafers are 200 mm diameter UNIBOND® wafers from SOITEC. Thicknesses of the top silicon film and the BOX layer are 100 nm and 145 nm, respectively. For I/O devices in this experiment, the thickness of the gate oxide is 6 nm. The 24-pin DIP ceramic package is applied to these test samples due to technical difficulties of on-wafer measurement in the radiation environment. The operating voltage of I/O devices is 3.3 V. The Co-60 $\gamma $-ray radiation source of Xinjiang Technical Institute of Physics and Chemistry was used to provide a radiation exposure environment at dose rate around 100 rad(Si)/s (97.59 rad(Si)/s). During radiation exposure, the devices were under PG bias conditions (source and drain bias at 3.3 V and other terminals grounded). The break time between two radiation points is limited within half an hour to avoid the anneal effect. During these break times, the $I$–$V$ characteristics of the devices were measured by a Keithley 4200B parameter analyzer at room temperature. The threshold voltages in this study are extracted by a constant current method. The threshold voltage is defined as the gate voltage (or back gate voltage) when the drain current reaches $(W/L)\times10^{-7}$ A and the threshold voltages are extracted at the drain bias of 0.1 V.
cpl-34-1-016103-fig2.png
Fig. 2. Body current-dependence of gate voltage at $V_{\rm ds}=3.3$ V, $V_{\rm bs}=V_{\rm bgs}=0$ V. Different curves are test results after radiation exposure at PG bias with different doses. The black one is the $I_{\rm b}$–$V_{\rm gs}$ characteristic of 10/0.35 PDSOI I/O NMOSFET before irradiation. The others are the corresponding curves at dose 30 krad(Si), 50 krad(Si) and 100 krad(Si), respectively.
Figure 2 is the body currents' dependence on the gate voltage at $V_{\rm ds}=3.3$ V and $V_{\rm bs}=V_{\rm bgs}=0$. The $I_{\rm b}$–$V_{\rm gs}$ curves before and after irradiation with TID dose at 30, 50, 100 krad(Si) are shown. The body current increases before the peak for the drain current increases with the gate voltage. The current decreases after the peak for the lateral electric field decreases with the gate voltage. Two phenomena are concluded. First, the peak value of the body current decreases from 2.72 μA of pre-irradiation to 1.7 μA of 30 krad(Si), 1.5 μA of 50 krad(Si) and 1.1 μA of 100 krad(Si). Secondly, the corresponding gate voltages of the peak left shift from 1.15 V of pre-irradiation to 1.05 V of 30 krad(Si), 0.95 V of 50 krad(Si) and 0.9 V of 100 krad(Si). The decrease of the peak value is mainly caused by the weakness of the lateral electric field induced by the positive charge in the BOX, for a weak lateral electric field goes against the impact ionizing of the carriers in the pinch-off region. With more positive charge in the BOX, the back gate channel can be opened, and the effective gate voltage increases with the irradiation dose. The maximum lateral electric field is positively correlated to the voltage drop on the pinch-off region which is $V_{\rm ds}-(V_{\rm gs, eff}-V_{\rm th})$ approximately. With higher TID dose, the maximum lateral field becomes a limitation of the body current at lower gate voltage. Thus the corresponding gate voltage of the peak has a left shift. The original physical mechanism of the body current is the impact ionizing carriers.[1,8] The impact ionizing factor is $$\begin{align} \alpha _n =\alpha \exp \Big(\frac{\beta}{\varepsilon}\Big)({\rm cm}^{-1}),~~ \tag {1} \end{align} $$ where $\alpha$ and $\beta$ are impact ionizing constants for devices, and $\varepsilon$ is the lateral field along the channel region.[9] The impact ionizing is a low level multiplication procedure. The body current can be expressed as an integer of the impact ionizing factor along the channel Eq. (2) $$\begin{align} I_{\rm b} =I_{\rm d} \int_{y=0}^{l_{\rm i}} {\alpha _n dy}.~~ \tag {2} \end{align} $$ The integer Eq. (2) cannot be solved analytically, while an approximate solution exists[10] $$\begin{align} I_{\rm b} =I_{\rm d} \frac{\alpha}{\beta}(V_{\rm ds}-V_{\rm dsat})\exp\Big(-\frac{\beta}{\varepsilon _{\rm m}}\Big),~~ \tag {3} \end{align} $$ where $V_{\rm dsat}=V_{\rm gs}-V_{\rm th}$ is the saturation voltage of the device. The value of $\varepsilon _{\rm m}$ is the maximum lateral field near the drain side[11] $$\begin{align} \varepsilon _{\rm m} =\frac{V_{\rm ds} -V_{\rm dsat}}{l},~~ \tag {4} \end{align} $$ where $l$ is the impact ionizing length, and $l\approx0.22t_{\rm ox}^{1/3}X_{j}^{1/2}$ for the bulk silicon MOSFET, with $t_{\rm ox}$ being the gate oxide thickness. For SOI MOSFET the junction depth $X_{j}$ may be replaced by $t_{\rm si}$, the top silicon film thickness.[1,12] The body current $I_{\rm b}$ can be divided into two main parts, the drain current and $\varepsilon _{\rm m}$ related terms Eq. (3). However, the ratio of the body current and the drain current is only dependent on the maximum lateral electric field $\varepsilon _{\rm m}$, $$\begin{align} \frac{I_{\rm b}}{I_{\rm d}}=\alpha l\cdot \frac{\varepsilon _{\rm m}}{\beta}\cdot \exp \Big(-\frac{\beta}{\varepsilon _{\rm m}}\Big).~~ \tag {5} \end{align} $$ To study the dependence of the body current on the maximum lateral electric field, the $I_{\rm b}/I_{\rm d}$–$V_{\rm gs}$ curves are shown in Fig. 3. Figures 3(a) and 3(b) are linear and log view of $I_{\rm b}/I_{\rm d}$–$V_{\rm gs}$ curves at different TID doses under biases $V_{\rm ds}=3.3$ V, $V_{\rm bs}=V_{\rm bgs}=0$. As we have discussed, the decrease of the body current under TID radiation is caused by the trapped positive charges in the BOX layer. Curves in Fig. 3 indicate that the ratio $I_{\rm b}/I_{\rm d}$ decays with the increase of the dose in both the pre peak and after peak region. In Eq. (5), $I_{\rm b}/I_{\rm d}$ is an increasing function of $\varepsilon _{\rm m}$. Impact ionizing parameter $\beta$ is a constant of silicon materials (about $1.92\times10^{6}$ V/cm in the surface and $1.23\times10^{6}$ V/cm in the bulk[9]). Thus the decays of $I_{\rm b}/I_{\rm d}$ under TID radiation can only be interpreted by the decrease of the maximum lateral electric field $\varepsilon _{\rm m}$.
cpl-34-1-016103-fig3.png
Fig. 3. The $I_{\rm b}/I_{\rm d}$–$V_{\rm gs}$ curves of 10/0.35 PDSOI I/O NMOSFET with different doses of radiation under biases $V_{\rm ds}=3.3$ V, $V_{\rm bs}=V_{\rm bgs}=0$: (a) linear view, and (b) log view.
cpl-34-1-016103-fig4.png
Fig. 4. Front gate (a) and back gate (b) transfer characteristic curves. Bias condition (a) $V_{\rm ds}=0.1$ V, $V_{\rm bs}=V_{\rm bgs}=0$; (b) $V_{\rm ds}=0.1$ V, $V_{\rm bs}=V_{\rm gs}=0$.
TID-effect-induced trapped positive charges in the BOX layer may cause the negative shift of both front gate and back gate threshold voltage as shown in Fig. 4. Curves in Fig. 4 are transfer characteristic of front gate and back gate at $V_{\rm ds}=0.1$ V. These two graphs are used to estimate the threshold voltage at various doses. The front gate threshold voltages extracted from Fig. 4(a) are 0.61 V, 0.58 V, 0.56 V and 0.49 V for pre-irradiation, 30 krad(Si), 50 krad(Si) and 100 krad(Si). Similarly, the back gate threshold voltages are 12.34 V, 8.76 V, 7.57 V and 5.15 V, respectively. As the saturation voltage $V_{\rm dsat}$ is estimated as $V_{\rm gs}-V_{\rm th}$, the negative shift of the threshold voltage will increase the saturation voltage accordingly. The increase of the saturation voltage will induce a decrease of the maximum lateral electric field $\varepsilon _{\rm m}$. The impact ionizing area in SOI MOSFET is the pinch-off region of the channel with high lateral electric field near the drain side for a relatively high voltage applied on the drain terminal. TID-induced positive charges are placed in the BOX layer. These charges can counteract the lateral electric field formed by the high potential of the drain to some extent.[8] That is why the lateral electric field near the drain decreases with the dose and the body current of device decays concomitantly. To imitate the TID effects of devices after PG bias irradiation, extra positive charges are placed on the interface of the top silicon film and the BOX layer. The charge surface density is tuned according to the back gate threshold voltage shift in Fig. 4(b). With these extra charges, a simulated lateral electric field from the source side along the channel to the drain side is acquired. Figure 5 shows the lateral electric field from the source side to drain side of pre-irradiation and different TID doses under bias $V_{\rm gs}=1$ V, $V_{\rm ds}=3.3$ V, $V_{\rm bs}=V_{\rm bgs}=0$. The maximum lateral electric fields obtained from Fig. 4 are $1.15\times10^{5}$ V/cm of pre-irradiation, $1.09\times10^{5}$ V/cm of 30 krad(Si), $1.07\times10^{5}$ V/cm of 50 krad(Si) and $9.76\times10^{4}$ V/cm of 100 krad(Si), respectively. As predicted before, the maximum lateral electric field in the impact ionizing area decays with TID dose.
cpl-34-1-016103-fig5.png
Fig. 5. Lateral electrical field along the channel at bias of $V_{\rm ds}=3.3$ V, $V_{\rm gs}=1$ V, $V_{\rm bs}=V_{\rm bgs}=0$ V. Different curves are simulation results of pre-irradiation and after radiation exposure at PG bias with different TID doses. The black one is $E_{y}-y$ dependence of 10/0.35 PDSOI I/O NMOSFET before irradiation. The others are corresponding curves at doses 30 krad(Si), 50 krad(Si) and 100 krad(Si), respectively.
In summary, we have presented the TID-induced body current lowering effect observed in the 130 nm PDSOI I/O NMOSFETs. The body current lowering is mainly induced by the decays of the maximum lateral electric field in the pinch-off region. The trapped charge generated at the BOX layer counteracts the maximum lateral electric field in the ionizing impact region near the drain side. The decrease of the maximum lateral electric field leads to the decrease of the body current finally. For designers of radiation reliable circuits, attention should be paid to the body current lowering effect. References The Enhanced Role of Shallow-Trench Isolation in Ionizing Radiation Damage of Narrow Width Devices in 0.2 μm Partially-Depleted Silicon-on-Insulator TechnologyNew Method of Total Ionizing Dose Compact Modeling in Partially Depleted Silicon-on-Insulator MOSFETsChallenges in hardening technologies using shallow-trench isolationModeling of Radiation-Induced Leakage and Low Dose-Rate Effects in Thick Edge Isolation of Modern MOSFETsTotal-Ionizing-Dose Induced Coupling Effect in the 130-nm PDSOI I/O nMOSFETsA simple method to characterize substrate current in MOSFET'sDependence of channel electric field on device scaling
[1]Ma Z J, Wann H J, Chan M et al 1994 IEEE Reliability Physics Symposium p 52
[2] Huang H X, Bi D W, Peng C et al 2013 Chin. Phys. Lett. 30 080701
[3] Huang J Q, He W W, Chen J et al 2016 Chin. Phys. Lett. 33 096101
[4]Schwank J 2002 IEEE NSREC Short Course p 123
[5] Shaneyfelt M R et al 1998 IEEE Trans. Nucl. Sci. 45 2584
[6] Zebrev G I and Gorbunov M S 2009 IEEE Trans. Nucl. Sci. 56 2230
[7]Hu C M 1983 IEEE Int. Electron Devices Meet. Tech. Dig. 83 176
[8] Peng C, Hu Z Y, Ning B X et al 2014 IEEE Electron Device Lett. 35 503
[9]Slotboom J W, Streutker G et al 1987 IEEE Int. Electron Devices Meet. Tech. Dig. 87 494
[10] Chan T Y, Ko P K and Hu C M 1984 IEEE Electron Device Lett. 5 505
[11] Chan T Y, Ko P K and Hu C M 1985 IEEE Electron Device Lett. 6 551
[12]Wann H J, King J, Chen J, Ko P K, Hu C M 1993 IEEE SOI Conf. p 118