| Original Articles |
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High Performance P-Channel Schottky Barrier MOSFETs with Self-Aligned PtSi Source/Drain on Thin Film SOI Substrate |
| ZHU Shi-Yang1,2;LI Ming-Fu2 |
| 1Department of Microelectronics, Fudan University, Shanghai 200433
2Silicon Nano Device Laboratory, Department of Electrical and Computer Engineering, National University of Singapore, Singapore, 119260 |
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| Cite this article: |
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ZHU Shi-Yang, LI Ming-Fu 2005 Chin. Phys. Lett. 22 2020-2022 |
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Abstract P-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with PtSi Schottky barrier source/drain, high-k gate dielectric and metal gate electrode were fabricated on a thin p-type silicon-on-insulator (SOI) substrate using a simplified low temperature process. The device works on a fully-depleted accumulation-mode and has an excellent electrical performance. It reaches Ion/Ioff ratio of about 107, subthreshold swing of 65mV/decade and saturation drain current of Idx = 8.8μA/μm at |Vg- Vth|= |Vd| = 1V for devices with the channel length 4.0μm and the equivalent oxide thickness 2.0nm. Compared to the corresponding bulk-Si counterparts, SOI p-SBMOSFETs have smaller off-state current due to reduction of the PtSi/Si contact area.
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| Keywords:
71.30.Th
73.40.Qv
73.61.At
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Published: 01 August 2005
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| PACS: |
71.30.Th
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73.40.Qv
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(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))
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73.61.At
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(Metal and metallic alloys)
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