Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor
XU Cheng1,2, LIU Bo1, CHEN Yi-Feng2, LIANG Shuang2, SONG Zhi-Tang1, FENG Song-Lin1, WAN Xu-Dong3, YANG Zuo-Ya3, XIE Joseph3, CHEN Bomy4
1Laboratory of Nanotechnology, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050 2Graduate School of the Chinese Academy of Sciences, Beijing 1000493Semiconductor Manufacturing International Corporation, Shanghai 2012034Silicon Storage Technology Inc., 1171 Sonora Court, Sunnyvale, CA 94086, USA
Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor
1Laboratory of Nanotechnology, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050 2Graduate School of the Chinese Academy of Sciences, Beijing 1000493Semiconductor Manufacturing International Corporation, Shanghai 2012034Silicon Storage Technology Inc., 1171 Sonora Court, Sunnyvale, CA 94086, USA
摘要A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0.18μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0V and pulse width of 50ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.
Abstract：A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0.18μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0V and pulse width of 50ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.
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2008, Vol. 25 
