1State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 2004332School of Information and Communication, KTH (Royal Institute of Technology), Electrum 229, SE-164 40 Kista, Sweden
Robust Low Voltage Program-Erasable Cobalt-Nanocrystal Memory Capacitors with Multistacked Al2O3/HfO2/Al2O3 Tunnel Barrier
1State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 2004332School of Information and Communication, KTH (Royal Institute of Technology), Electrum 229, SE-164 40 Kista, Sweden
摘要An atomic-layer-deposited Al2O3/HfO2/Al2O3 (A/H/A) tunnel barrier is investigated for Co nanocrystal memory capacitors. Compared to a single Al2O3 tunnel barrier, the A/H/A barrier can significantly increase the hysteresis window, i.e., an increase by 9V for ±12V sweep range. This is attributed to a marked decrease in the energy barriers of charge injections for the A/H/A tunnel barrier. Further, the Co-nanocrystal memory capacitor with the A/H/A tunnel barrier exhibits a memory window as large as 4.1V for 100μs program/erase at a low voltage of ±7V, which is due to fast charge injection rates, i.e., about 2.4×1016cm-2s-1 for electrons and 1.9×1016cm-2s-1 for holes.
Abstract:An atomic-layer-deposited Al2O3/HfO2/Al2O3 (A/H/A) tunnel barrier is investigated for Co nanocrystal memory capacitors. Compared to a single Al2O3 tunnel barrier, the A/H/A barrier can significantly increase the hysteresis window, i.e., an increase by 9V for ±12V sweep range. This is attributed to a marked decrease in the energy barriers of charge injections for the A/H/A tunnel barrier. Further, the Co-nanocrystal memory capacitor with the A/H/A tunnel barrier exhibits a memory window as large as 4.1V for 100μs program/erase at a low voltage of ±7V, which is due to fast charge injection rates, i.e., about 2.4×1016cm-2s-1 for electrons and 1.9×1016cm-2s-1 for holes.
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