High Performance P-Channel Schottky Barrier MOSFETs with Self-Aligned PtSi Source/Drain on Thin Film SOI Substrate
ZHU Shi-Yang1,2, LI Ming-Fu2
1Department of Microelectronics, Fudan University, Shanghai 200433
2Silicon Nano Device Laboratory, Department of Electrical and Computer Engineering, National University of Singapore, Singapore, 119260
High Performance P-Channel Schottky Barrier MOSFETs with Self-Aligned PtSi Source/Drain on Thin Film SOI Substrate
ZHU Shi-Yang1,2;LI Ming-Fu2
1Department of Microelectronics, Fudan University, Shanghai 200433
2Silicon Nano Device Laboratory, Department of Electrical and Computer Engineering, National University of Singapore, Singapore, 119260
Abstract： P-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with PtSi Schottky barrier source/drain, high-k gate dielectric and metal gate electrode were fabricated on a thin p-type silicon-on-insulator (SOI) substrate using a simplified low temperature process. The device works on a fully-depleted accumulation-mode and has an excellent electrical performance. It reaches Ion/Ioff ratio of about 107, subthreshold swing of 65mV/decade and saturation drain current of Idx = 8.8μA/μm at |Vg- Vth|= |Vd| = 1V for devices with the channel length 4.0μm and the equivalent oxide thickness 2.0nm. Compared to the corresponding bulk-Si counterparts, SOI p-SBMOSFETs have smaller off-state current due to reduction of the PtSi/Si contact area.
ZHU Shi-Yang;LI Ming-Fu. High Performance P-Channel Schottky Barrier MOSFETs with Self-Aligned PtSi Source/Drain on Thin Film SOI Substrate[J]. 中国物理快报, 2005, 22(8): 2020-2022.
ZHU Shi-Yang, LI Ming-Fu. High Performance P-Channel Schottky Barrier MOSFETs with Self-Aligned PtSi Source/Drain on Thin Film SOI Substrate. Chin. Phys. Lett., 2005, 22(8): 2020-2022.
2005, Vol. 22 
